Payload Computing · Payload Computing
FPGA & Digital Signal Processing Engineer
Implement high-speed signal processing, encoding, beamforming and payload data pipelines in flight-qualified FPGA platforms.
Role mandate
Build the capability for the era ahead.
This team member will combine subject-matter depth, sound judgment and disciplined execution to move the mission from architecture to measurable results.
Responsibilities
- Own the Payload Computing workstream for FPGA & Digital Signal Processing Engineer and deliver measurable technical or operating outcomes.
- Build governed software, models or data pipelines for reliable enterprise and mission operations.
- Define testing, monitoring, security and human-approval controls for production deployment.
- Integrate algorithms with real operational data, infrastructure and decision workflows.
Required qualifications
- Hands-on experience delivering production software, machine-learning systems, embedded code or digital models.
- Strong skills in system design, testing, version control and technical documentation.
- Ability to work across data, infrastructure, security and domain-engineering teams.
Preferred experience
- Experience with autonomous agents, closed models, neural networks, real-time systems or hardware acceleration.
- Background in regulated, aerospace or high-availability environments.
Scientific and technical requirements
Physics, mathematics and engineering foundations
- Digital logic, computer architecture, real-time systems, signals and systems, fault tolerance, networking and deterministic scheduling.
- Boolean algebra, finite-state machines, queueing, coding theory, numerical representation and worst-case execution-time analysis.
Mathematics and working equations
- Schedulability for fixed-priority periodic tasks is assessed from utilization and worst-case response time, including blocking and interrupt latency.
- Data throughput = sample rate × bits/sample × channels plus framing/coding overhead; close processing, memory and downlink budgets.
- Reliability and upset rates must include radiation environment, mitigation coverage and recovery time.
Hardware, flight and infrastructure components
- Radiation-tolerant processor/SoC/FPGA, volatile and nonvolatile memory, watchdogs, timers, ADC/DAC, SpaceWire/CAN/UART/Ethernet interfaces and redundant clocks.
- Bootloader, RTOS or flight executive, BSP/drivers, command and telemetry services, file system, FDIR and secure update chain.
Software, laboratory and analysis tools
- C/C++, Rust or Ada where appropriate; HDL; cross-compilers, static analysis, debuggers, logic analyzers, oscilloscopes and protocol analyzers.
- Git, CI, unit/integration test, software-in-the-loop, processor/FPGA-in-the-loop and hardware-in-the-loop benches.
Verification and mission skills
- Prove timing, memory bounds, deterministic startup, safe-mode entry, watchdog recovery, fault injection, interface compliance and code/requirements traceability.
Authoritative technical references
The hiring sequence will follow operating milestones and project requirements. The position may begin through advisory, consulting or project-based work before moving into a full-time role.
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